MAX19707ETM+T【PDF 10/37 页】IC ANLG FRNT END 48-TQFN

收藏本站

您好，
买卖IC网欢迎您。
请登录
免费注册

买卖IC网

Sheet目录2009

6页 7页 8页 9页 [10页]11页 12页 13页 14页

MAX19707

10-Bit, 45Msps, Ultra-Low-Power

Analog Front-End

______________________________________________________________________________________

Figure 3. Rx ADC System Timing Diagram

tDOQ

tCL

tCH

tCLK

tDOI

5 CLOCK-CYCLE LATENCY (CHI)

5.5 CLOCK-CYCLE LATENCY (CHQ)

D0–D9

D0Q

D1I

D1Q

D2I

D2Q

D3I

D3Q

D4I

D4Q

D5I

D5Q

D6I

D6Q

CHI

CHQ

CLK

Table 2. Tx DAC Output Voltage vs. Input Codes

(Internal Reference Mode VREFDAC = 1.024V, External Reference Mode VREFDAC = VREFIN; VFS = ±400 for 800mVP-P

Full Scale)

DIFFERENTIAL OUTPUT VOLTAGE (V)

OFFSET BINARY (D0–D9)

INPUT DECIMAL CODE

11 1111 1111

1023

11 1111 1110

1022

10 0000 0001

513

10 0000 0000

512

01 1111 1111

511

00 0000 0001

00 0000 0000

REFDAC

1024

1023

()

REFDAC

1024

1021

1023

()

REFDAC

1024

1023

()

REFDAC

1024

1023

()

REFDAC

1024

1023

()

REFDAC

1024

1021

1023

()

REFDAC

1024

1023

()

Dual, 10-Bit Tx DAC

The dual, 10-bit digital-to-analog converter (Tx DAC)

operates with clock speeds up to 45MHz. The Tx DAC

digital inputs, D0–D9, are multiplexed on a single 10-bit

bus. The voltage reference determines the Tx DAC full-

scale output voltage. See the Reference Configurations

section for details on setting the reference voltage.

The Tx DAC outputs at IDN, IDP and QDN, QDP are

biased at a 0.7V to 1.05V adjustable DC common-

mode bias and designed to drive a differential input

stage with

≥ 70kΩ input impedance. This simplifies the

analog interface between RF quadrature upconverters

and the MAX19707. Many RF upconverters require a

0.7V to 1.05V common-mode bias. The Tx DAC DC

common-mode bias eliminates discrete level-setting

resistors and code-generated level shifting while pre-

serving the full dynamic range of each Tx DAC. The Tx

DAC differential analog outputs cannot be used in sin-

gle-ended mode because of the internally generated

common-mode DC level. Table 2 shows the Tx DAC

output voltage vs. input codes. Table 10 shows the

selection of DC common-mode levels. See Figure 4 for

an illustration of the Tx DAC analog output levels.

发布紧急采购，3分钟左右您将得到回复。

采购需求

(若只采购一条型号，填写一行即可)

*型号	*数量	厂商	批号	封装

添加更多采购

采购需求

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

我的联系方式